The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2018

Filed:

Nov. 22, 2016
Applicant:

Lear Corporation, Southfield, MI (US);

Inventors:

Riad Ghabra, Northville, MI (US);

William Ramsey Reynolds, Beverly Hills, MI (US);

Jason Summerford, Novi, MI (US);

Assignee:

Lear Corporation, Southfield, MI (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R 13/648 (2006.01); H05K 1/14 (2006.01); H05K 1/11 (2006.01); G07C 9/00 (2006.01); G08C 17/02 (2006.01); B60R 25/40 (2013.01);
U.S. Cl.
CPC ...
H05K 1/141 (2013.01); B60R 25/406 (2013.01); G07C 9/00111 (2013.01); G08C 17/02 (2013.01); H05K 1/115 (2013.01); H05K 1/144 (2013.01); H05K 2201/042 (2013.01); H05K 2201/048 (2013.01); H05K 2201/10037 (2013.01); H05K 2201/10098 (2013.01); H05K 2201/10318 (2013.01);
Abstract

A portable remote control device such as a key fob includes a motherboard, a battery daughterboard having a battery holder to secure a battery, and an interconnect mounting the battery daughterboard to the motherboard. The battery daughterboard may include a first via and the motherboard may include a second via in which the vias are misaligned with one another. The interconnect includes a first pin inserted through the first via and the second via to mount the battery daughterboard to the motherboard. The first pin has a disjointed configuration over a length of the pin in correspondence with a misalignment of the first via and the second via.


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