The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2018

Filed:

Sep. 02, 2016
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventor:

Satoru Fukuchi, Chigasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01P 3/08 (2006.01); H03H 7/42 (2006.01); H01L 23/498 (2006.01); H01L 23/66 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H03H 7/427 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/66 (2013.01); H01P 3/081 (2013.01); H05K 1/0245 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6661 (2013.01); H05K 2201/09272 (2013.01); H05K 2201/09727 (2013.01);
Abstract

According to one embodiment, there is provided a multilayer substrate including a signal layer. The signal layer includes a first line and a second line which form a differential pair. The first line electrically connects a first node and a second node in the signal layer. The second line electrically connects a third node and a fourth node in the signal layer. The interval between the first line and the second line is approximately constant from the first node to the second node. A physical length from the third node to the fourth node in the second line is shorter than a physical length from the first node to the second node in the first line. A width of the second line is thicker than a width of the first line.


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