Elastic memory expansion chip architecture

Abstract

An integrated circuit (IC) can dynamically manage memory communication paths between multiple processors and multiple memory modules. The IC can include upstream logic that performs data conversion and provides memory communication paths between each processor and a corresponding upstream port. An interconnect layer in the IC can be electrically coupled to the upstream ports to multiple downstream ports. An interconnect management processor electrically coupled to the interconnect layer can respond to received commands by executing an allocation program stored in a read-only memory (ROM) that dynamically establishes and terminates memory communication paths between the upstream ports and the downstream ports. A memory interface layer in the IC can be electrically coupled to the downstream ports and to the memory modules, and can provide, through corresponding memory physical interfaces, memory communication paths between the multiple downstream ports and corresponding memory modules.