The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2018

Filed:

Apr. 16, 2015
Applicant:

Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;

Inventors:

Kuk-Hwan Ahn, Hwaseong-si, KR;

Seokyun Son, Yongin-si, KR;

Jai-Hyun Koh, Hwaseong-si, KR;

Geunjeong Park, Daegu, KR;

Dong-Won Park, Hwaseong-si, KR;

Donghwa Shin, Yongin-si, KR;

Won Sik Oh, Seoul, KR;

Ik Soo Lee, Seoul, KR;

Sang-Uk Lim, Yongin-si, KR;

Seokha Hong, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3655 (2013.01); G09G 3/3607 (2013.01); G09G 3/3614 (2013.01); G09G 3/3648 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0452 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/0218 (2013.01); G09G 2310/0235 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0209 (2013.01); G09G 2320/0247 (2013.01);
Abstract

According to an embodiment, a display apparatus includes gate lines extending in a first direction, data lines extending in a second direction crossing the first direction, and pixels connected to the gate lines and the data lines. The pixels include pixels arranged in a k-th row and pixels arranged in a (k+1)th row disposed adjacent to the pixels arranged in the k-th row in the second direction. An (i+1)th gate line is disposed between the pixels in the k-th row and the pixels in the (k+1)th row. A first pixel arranged in a g-th column among the pixels arranged in the k-th row and a second pixel arranged in the g-th column among the pixels arranged in the (k+1)th row are connected to a j-th data line. The pixels arranged in the k-th row are alternately connected to an i-th gate line and the (i+1)th gate line.


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