The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Aug. 30, 2016
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Simone Lavanga, Faak am See, AT;

Uttiya Chowdhury, Villach, AT;

Mattia Capriotti, Villach, AT;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01); H01L 21/02 (2006.01); H01L 21/78 (2006.01); H01L 21/306 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 23/544 (2013.01); H01L 21/0206 (2013.01); H01L 21/0214 (2013.01); H01L 21/0217 (2013.01); H01L 21/02118 (2013.01); H01L 21/02164 (2013.01); H01L 21/02318 (2013.01); H01L 21/02387 (2013.01); H01L 21/02538 (2013.01); H01L 21/02658 (2013.01); H01L 21/30621 (2013.01); H01L 21/78 (2013.01); H01L 29/20 (2013.01); H01L 2223/5446 (2013.01); H01L 2223/54426 (2013.01);
Abstract

A type III-V semiconductor substrate is provided. Semiconductor material is removed from the type III-V semiconductor substrate such that the type III-V semiconductor substrate comprises one or more alignment features extending away from a main lateral surface. Each of the alignment features includes a first lateral surface that is vertically offset from the main lateral surface, and first and second vertical sidewalls that extend between the first lateral surface and the main lateral surface. An epitaxy blocker is formed on the first and second vertical sidewalls of each alignment feature. A type III-V semiconductor regrown layer is epitaxially grown on a portion of the semiconductor wafer that includes the one or more alignment features. The epitaxy blocker prevents the type III-V semiconductor regrown layer from forming on the first and second vertical sidewalls of the one or more alignment features.


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