The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2018
Filed:
Aug. 07, 2015
Applicant:
Fuji Electric Co., Ltd., Kawasaki-shi, JP;
Inventors:
Masaaki Tachioka, Matsumoto, JP;
Tsunehiro Nakajima, Matsumoto, JP;
Assignee:
FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/683 (2006.01); B32B 37/14 (2006.01); B32B 37/18 (2006.01); B32B 38/10 (2006.01); B32B 7/12 (2006.01); B32B 9/04 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6835 (2013.01); B32B 7/12 (2013.01); B32B 9/04 (2013.01); B32B 37/144 (2013.01); B32B 37/18 (2013.01); B32B 38/10 (2013.01); B32B 2255/20 (2013.01); B32B 2307/202 (2013.01); B32B 2313/00 (2013.01); B32B 2315/00 (2013.01); B32B 2457/14 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68381 (2013.01); Y10T 156/1111 (2015.01);
Abstract
Provided is a semiconductor device manufacturing method that includes joining a support substrate to a back side of a semiconductor wafer across a ceramic adhesive layer and a mask, to form a joined body. The method further includes forming a functional structure on a front side of the semiconductor wafer. The method further includes detaching the support substrate from the semiconductor wafer by removing the ceramic adhesive layer and the mask. The method further includes a back side processing step of carrying out back side processing on the back side of the semiconductor wafer.