The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Apr. 10, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Xuehong Yu, San Jose, CA (US);

Yingda Dong, San Jose, CA (US);

Assignee:

SanDisk Technologies LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/04 (2006.01); G11C 16/14 (2006.01); G11C 16/08 (2006.01);
U.S. Cl.
CPC ...
G11C 16/14 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01);
Abstract

Apparatuses and techniques are described for temperature dependent erase in non-volatile storage. In one aspect, select gate voltage magnitude depends on temperature. This temperature dependent select gate voltage may be applied to a control gate of a select transistor while applying an erase voltage to a bit line and/or source line coupled to the select transistor. This can help assure that there is sufficient GIDL current for efficient erase at lower temperatures. In one aspect, a control circuit increases the duration of the erase voltage that is applied to the source line and/or the bit line at lower temperatures. In one aspect, the magnitude of the first erase voltage in a sequence depends on the present temperature.


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