The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Aug. 22, 2016
Applicant:

Apple Inc., Cupertino, CA (US);

Inventor:

William R. Weier, Austin, TX (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); H01L 29/78 (2006.01); H03K 19/20 (2006.01); H03K 3/356 (2006.01); G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/10 (2013.01); G11C 7/12 (2013.01); H01L 29/785 (2013.01); H03K 3/356104 (2013.01); H03K 19/20 (2013.01);
Abstract

A bit line sensing latch circuit is disclosed. In one embodiment, a latch circuit includes a keeper and a precharge circuit. The keeper may be implemented using a single pair of transistors that are cross-coupled between first and second differential signal nodes. A gate terminal of a first one of the pair of transistors is coupled to the first differential signal node, while the drain terminal of the same transistor is coupled to the second differential signal node. The gate terminal of a second one of the pair of transistors is coupled to the second differential signal node, while its drain terminal is coupled to the first differential signal node. The bitline sensing latch also includes a precharge circuit, and may operates in two phases, a precharge phase and an enable phase.


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