The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2018
Filed:
Sep. 21, 2015
Applicant:
Microchip Technology Incorporated, Chandler, AZ (US);
Inventors:
Joseph W. Triece, Phoenix, AZ (US);
Rodney J. Pesavento, Chandler, AZ (US);
Gregg D. Lahti, Gilbert, AZ (US);
Steven Dawson, Chandler, AZ (US);
Assignee:
MICROCHIP TECHNOLOGY INCORPORATED, Chandler, AZ (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/28 (2006.01); G06F 13/00 (2006.01); G06F 13/34 (2006.01); G06F 13/30 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/34 (2013.01); G06F 13/1689 (2013.01); G06F 13/285 (2013.01); G06F 13/30 (2013.01); G06F 13/4022 (2013.01);
Abstract
A system has at least one bus, a central processing unit (CPU) coupled with the bus, a memory coupled with the bus, a direct memory access (DMA) controller having a plurality of DMA channels and operating independently from the CPU and being coupled with the bus, wherein for access to the bus the DMA controller is programmable in a first mode to have priority over the CPU and in a second mode in which at least one DMA channel of the DMA controller is suspended from accessing the bus.