The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Mar. 31, 2016
Applicant:

Emc Ip Holding Company Llc, Hopkinton, MA (US);

Inventor:

Kevin Rowett, Cupertino, CA (US);

Assignee:

EMC IP Holding Company LLC, Hopkinton, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01); G06F 12/08 (2016.01); G06F 12/0808 (2016.01); G06F 12/0815 (2016.01); G06F 3/06 (2006.01); G06F 13/40 (2006.01); G06F 12/0802 (2016.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0611 (2013.01); G06F 3/0604 (2013.01); G06F 3/0616 (2013.01); G06F 3/0647 (2013.01); G06F 3/0685 (2013.01); G06F 11/1068 (2013.01); G06F 12/0802 (2013.01); G06F 13/4068 (2013.01); G11C 29/52 (2013.01); G06F 2212/60 (2013.01);
Abstract

A plurality of programmable logic blocks are programmed in a first configuration to perform one or both of an access function and a management function with respect to a plurality of non-volatile memory modules. A high data transfer rate connection is provided to an external random access memory device, wherein said at least a subset of said programmable logic blocks are programmed in said first configuration to perform one or both of said access function and said management function at least in part using data sent via a communication interface, wherein the communication interface is coupled to at least a subset of said programmable logic blocks.


Find Patent Forward Citations

Loading…