The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2018
Filed:
Dec. 18, 2013
Applicant:
Sony Corporation, Tokyo, JP;
Inventor:
Hiroshi Asami, Tokyo, JP;
Assignee:
SONY CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H05K 3/10 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H05K 1/11 (2006.01); H01L 21/56 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H05K 3/108 (2013.01); H01L 21/4853 (2013.01); H01L 23/49816 (2013.01); H01L 23/49838 (2013.01); H01L 24/81 (2013.01); H05K 3/3478 (2013.01); H01L 21/563 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/12042 (2013.01); H05K 1/111 (2013.01); H05K 3/3436 (2013.01); H05K 3/3452 (2013.01); H05K 2201/099 (2013.01); H05K 2201/10977 (2013.01); Y10T 29/49155 (2015.01);
Abstract
A circuit substrate includes: a mounting region having an exposed surface that is planarized, and in which a predetermined chip is to be mounted; patterns provided in the mounting region, and including respective top faces that form a part of the exposed surface; and solder bumps provided on the respective patterns, and having substantially same shape as one another.