The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Jun. 26, 2016
Applicant:

Vi Systems Gmbh, Berlin, DE;

Inventors:

Joerg-Reinhardt Kropp, Berlin, DE;

Nikolay Ledentsov, Berlin, DE;

Vitaly Shchukin, Berlin, DE;

Assignee:

VI Systems GmbH, Berlin, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01S 5/00 (2006.01); H01S 5/183 (2006.01); H01S 5/22 (2006.01); H01S 5/30 (2006.01); H01S 5/02 (2006.01); H01S 5/187 (2006.01); H01S 5/042 (2006.01); H01S 5/32 (2006.01);
U.S. Cl.
CPC ...
H01S 5/18316 (2013.01); H01S 5/0208 (2013.01); H01S 5/0421 (2013.01); H01S 5/183 (2013.01); H01S 5/187 (2013.01); H01S 5/18308 (2013.01); H01S 5/18313 (2013.01); H01S 5/18327 (2013.01); H01S 5/2202 (2013.01); H01S 5/2214 (2013.01); H01S 5/305 (2013.01); H01S 5/3054 (2013.01); H01S 5/32 (2013.01);
Abstract

An optoelectronic semiconductor device is disclosed wherein the device is a vertical-cavity surface-emitting laser or a photodiode containing a section, the top part of which is electrically isolated from the rest of the device. The electric isolation can be realized by etching a set of holes and selective oxidation of AlGaAs layer or layers such that the oxide forms a continuous layer or layers everywhere beneath the top surface of this section. Alternatively, a device can be grown epitaxially on a semi-insulating substrate, and a round trench around a section of the device can be etched down to the semi-insulating substrate thus isolating this section electrically from the rest of the device. Then if top contact pads are deposited on top of the electrically isolated section, the pads have a low capacitance, and a pad capacitance below two hundred femto-Farads, and the total capacitance of the device below three hundred femto-Farads can be reached.


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