The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Jul. 26, 2016
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Inventors:

Takafumi Mizoguchi, Atsugi, JP;

Kojiro Shiraishi, Isehara, JP;

Masashi Tsubuku, Atsugi, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/10 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 29/24 (2006.01); H01L 21/764 (2006.01);
U.S. Cl.
CPC ...
H01L 29/78606 (2013.01); H01L 27/1225 (2013.01); H01L 27/1288 (2013.01); H01L 29/24 (2013.01); H01L 29/7869 (2013.01); H01L 29/78696 (2013.01); H01L 21/764 (2013.01);
Abstract

An object is to provide a method for manufacturing a semiconductor device without exposing a specific layer to moisture or the like at all. A thin film element is manufactured in such a manner that a first film, a second film, and a third film are stacked in this order; a resist mask is formed over the third film; a mask layer is formed by etching the third film with the use of the resist mask; the resist mask is removed; a second layer and a first layer are formed by performing dry etching on the second film and the first film with the use of the mask layer; a fourth film is formed to cover at least the second layer and the first layer; and sidewall layers are formed to cover at least the entire side surfaces of the first layer by performing etch back on the fourth film.


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