The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2018
Filed:
Nov. 06, 2015
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Manfred Eller, Wappingers Falls, NY (US);
Jin-Ping Han, Fishkill, NY (US);
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 21/332 (2006.01); H01L 29/78 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7848 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 29/6653 (2013.01); H01L 29/6659 (2013.01); H01L 29/66636 (2013.01); H01L 29/7833 (2013.01); H01L 29/7843 (2013.01); H01L 29/665 (2013.01); H01L 29/6656 (2013.01);
Abstract
Semiconductor devices and methods of manufacture thereof are disclosed. In a preferred embodiment, a method of manufacturing a semiconductor device includes providing a semiconductor wafer, forming a gate dielectric over the semiconductor wafer, and forming a gate over the gate dielectric. At least one recess is formed in the semiconductor wafer proximate the gate and the gate dielectric, at least a portion of the at least one recess extending beneath the gate. The at least one recess in the semiconductor wafer is filled with a semiconductive material.