The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Jul. 16, 2014
Applicant:

Panasonic Corporation, Osaka, JP;

Inventors:

Nobuo Aoi, Hyogo, JP;

Masaru Sasago, Toyama, JP;

Yoshihiro Mori, Osaka, JP;

Takeshi Kawabata, Osaka, JP;

Takashi Yui, Shiga, JP;

Toshio Fujii, Osaka, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 25/065 (2006.01); H01L 21/56 (2006.01); H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
H01L 24/01 (2013.01); H01L 21/568 (2013.01); H01L 21/82 (2013.01); H01L 23/3114 (2013.01); H01L 23/3185 (2013.01); H01L 24/19 (2013.01); H01L 24/80 (2013.01); H01L 24/92 (2013.01); H01L 24/94 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 25/0657 (2013.01); H01L 23/481 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13005 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/14131 (2013.01); H01L 2224/14135 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73259 (2013.01); H01L 2224/83104 (2013.01); H01L 2224/9202 (2013.01); H01L 2224/92224 (2013.01); H01L 2224/93 (2013.01); H01L 2224/94 (2013.01); H01L 2224/96 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06568 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A lamination structure includes a first semiconductor chip and a second semiconductor chip stacked via a bonding section so that a rear surface of the first semiconductor chip faces the main surface of the second semiconductor chip. At least a part of a side surface of the first semiconductor chip are covered with a first resin, a distribution layer is formed on the plane formed of the main surface of the first semiconductor chip and a surface of the first resin. At least part of electrodes existing in the main surface of the second semiconductor chip is electrically connected to at least part of first external electrodes formed on the distribution layer via the penetration electrodes that penetrate the first semiconductor chip.


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