The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Jun. 14, 2017
Applicant:

Dongbu Hitek Co., Ltd., Bucheon-si, KR;

Inventors:

Woo Cheol Shin, Suwon-si, KR;

Kyung Il Baek, Gimpo-si, KR;

Hyun Sup Jung, Incheon, KR;

Assignee:

Dongbu HiTek Co., Ltd., Bucheon-si, KR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/41 (2006.01); G11C 11/413 (2006.01); G11C 29/50 (2006.01); G11C 29/04 (2006.01); G11C 8/18 (2006.01); G11C 7/22 (2006.01);
U.S. Cl.
CPC ...
G11C 11/413 (2013.01); G11C 29/50012 (2013.01); G11C 7/222 (2013.01); G11C 8/18 (2013.01); G11C 2029/0401 (2013.01);
Abstract

A system for measuring an access time of a memory includes a first delay unit configured to delay a clock signal by a first delay time and to output a first delayed clock signal, a second delay unit configured to delay the clock signal by a second delay time greater than the first delay time and to output a second delayed clock signal, a memory configured to store data, the data being read from the memory in response to the first delayed clock signal, a detection data storage configured to store the data read from the memory in response to the second delayed clock signal, and a controller configured to measure an access time of the memory based on a comparison of the data in the detection data storage and the data in the memory, the first delayed clock signal and the second delayed clock signal.


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