The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2018
Filed:
Sep. 22, 2015
Emc Ip Holding Company Llc, Hopkinton, MA (US);
EMC IP Holding Company LLC, Hopkinton, MA (US);
Abstract
Described are techniques for determining slice sizes. First I/O workload information is received for a slice having a corresponding logical address subrange of a logical address range of a logical device. The corresponding logical address subrange is a first size denoting a size of the slice at a first point in time when the slice has a current I/O workload denoted by the first I/O workload information. It is determined, in accordance with the first I/O workload information, whether to adjust the size of the slice. Responsive to determining to adjust the size of the slice, first processing is performed that adjusts the size of the slice such as by partitioning the slice or merging the slice with one or more other adjacent slices.