The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2018

Filed:

Jun. 18, 2015
Applicant:

Avago Technologies General Ip (Singapore) Pte. Ltd., Singapore, SG;

Inventors:

Jouni Korhonen, Mountain View, CA (US);

Philippe Klein, Jerusalem, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/721 (2013.01); H04L 12/751 (2013.01); H04L 12/841 (2013.01); H04L 12/803 (2013.01); H04L 12/725 (2013.01);
U.S. Cl.
CPC ...
H04L 45/66 (2013.01); H04L 45/02 (2013.01); H04L 45/302 (2013.01); H04L 47/125 (2013.01); H04L 47/28 (2013.01);
Abstract

In some aspects, the disclosure is directed to methods and systems for management of path selection and reservation between layer 3 devices, as well as path selection and reservation across L2/L3 boundaries. In one implementation, path selection can be managed by separating independent but 'cooperating' layers, with layer 3 topology and non-adjacent layer 2 topologies handled separately. A first layer 3 router can be identified as a path computation engine (PCE), while other layer 3 routers can be implemented as path control clients (PCC(s)). One layer 2 PCE can be assigned per layer 2 topology, preventing competing path assignments and reservations.


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