The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2018

Filed:

Dec. 08, 2016
Applicants:

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Stmicroelectronics SA, Montrouge, FR;

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Inventors:

Louis Hutin, Saint Martin le Vinoux, FR;

Julien Borrel, Seyssinet, FR;

Yves Morand, Grenoble, FR;

Fabrice Nemouchi, Moirans, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66643 (2013.01); H01L 29/0895 (2013.01); H01L 29/66636 (2013.01); H01L 29/7839 (2013.01);
Abstract

A process for manufacturing a Schottky barrier field-effect transistor is provided. The process includes: providing a structure including a control gate and a semiconductive layer positioned under the gate and having protrusions that protrude laterally with respect to the gate; anisotropically etching at least one of the protrusions by using the control gate as a mask, so as to form a recess in this protrusion, this recess defining a lateral face of the semiconductive layer; depositing a layer of insulator on the lateral face of the semiconductive layer; and depositing a metal in the recess on the layer of insulator so as to form a contact of metal/insulator/semiconductor type between the deposit of metal and the lateral face of the semiconductive layer.


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