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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9911753 B1

PDFFull Text
Date of Patent:
Mar. 06, 2018

Filed:

Sep. 06, 2016

Semiconductor device and method for manufacturing semiconductor device

Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Masayuki Kitamura, Mie, JP;

Atsuko Sakata, Mie, JP;

Satoshi Wakatsuki, Mie, JP;

Takeshi Ishizaki, Aichi, JP;

Daisuke Ikeno, Mie, JP;

Tomotaka Ariga, Mie, JP;

Assignee:

Toshiba Memory Corporation, Tokyo, JP;

Attorney:

Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.

Primary Examiner:

Cheung Lee

Assistant Examiner:

Stephen C Smith

Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 29/792 (2006.01); H01L 29/66 (2006.01); H01L 27/11582 (2017.01); H01L 27/11556 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/486 (2013.01); H01L 23/49827 (2013.01); H01L 27/11556 (2013.01); H01L 29/66833 (2013.01); H01L 29/7926 (2013.01);
Abstract

According to one embodiment, an insulating layer is provided above a stairstep portion of a stacked body. A first cover film is provided between the stairstep portion and the insulating layer. The first cover film is of a material different from the insulating layer. A separation portion divides the stacked body and the insulating layer. A second cover film is provided at a side surface of the insulating layer on the separation portion side. The second cover film is of a material different from the insulating layer.

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Kitamura, Masayuki. (2018). Semiconductor device and method for manufacturing semiconductor device (U.S. Patent No. 9911753). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9911753

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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