The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2018
Filed:
Oct. 07, 2016
Arm Limited, Cambridge, GB;
Jungtae Kwon, San Jose, CA (US);
Young Suk Kim, San Jose, CA (US);
Vivek Nautiyal, Milpitas, CA (US);
Pranay Prabhat, Cambridge, GB;
Fakhruddin Ali Bohra, Austin, TX (US);
Shri Sagar Dwivedi, San Jose, CA (US);
Satinderjit Singh, Fremont, CA (US);
Lalit Gupta, Cupertino, CA (US);
ARM Limited, Cambridge, GB;
Abstract
Various implementations described herein are directed to an integrated circuit having a memory cell array with multiple rows of memory cells including at least one redundant row of memory cells. The memory cell array may be partitioned into multiple regions of memory cells including a first region of memory cells corresponding to a first part of the redundant row of memory cells and a second region of memory cells corresponding to a second part of the redundant row of memory cells. The integrated circuit may include wordline driver circuitry coupled to the first and second regions of memory cells and their corresponding first and second parts of the redundant row of memory cells. In some instances, the integrated circuit may include row shift circuitry coupled to the first and second regions of memory cells and their corresponding first and second parts of the redundant row of memory cells.