The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2018
Filed:
Nov. 08, 2016
Xilinx, Inc., San Jose, CA (US);
Rafael C. Camarota, San Jose, CA (US);
Sagheer Ahmad, Cupertino, CA (US);
Martin Newman, Saratoga, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Methods and apparatus are described for adding one or more features (e.g., HBM) to a qualified SSI technology programmable IC region by providing an interface (e.g., an HBM buffer region with a switch network) between the added feature device and the programmable IC region. One example IC package generally includes a package substrate; at least one interposer disposed above the package substrate; a programmable IC region disposed above the interposer; at least one fixed feature die disposed above the interposer; and an interface region disposed above the interposer and configured to couple the programmable IC region to the fixed feature die via a first set of interconnection lines routed through the interposer between a first plurality of ports of the interface region and the fixed feature die and a second set of interconnection lines routed between a second plurality of ports of the interface region and the programmable IC region.