The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2018
Filed:
May. 11, 2016
Applicant:
SK Hynix Inc., Icheon-Si, KR;
Inventors:
Chi-Ho Kim, Icheon-si, KR;
Ki-Seon Park, Icheon-Si, KR;
Assignee:
SK hynix Inc., Icheon-Si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 43/02 (2006.01); G06F 3/06 (2006.01); G06F 12/08 (2016.01); G06F 13/10 (2006.01); G06F 13/16 (2006.01); H01L 43/08 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0604 (2013.01); G06F 3/0656 (2013.01); G06F 3/0679 (2013.01); G06F 12/08 (2013.01); G06F 13/102 (2013.01); G06F 13/1673 (2013.01); H01L 43/02 (2013.01); H01L 43/08 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); G06F 2212/2024 (2013.01); G06F 2212/60 (2013.01);
Abstract
Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an interlayer dielectric layer formed over a substrate and having a contact hole; a contact plug formed in a lower part of the contact hole; a contact pad formed in an upper part of the contact hole; an amorphous buffer layer interposed between the contact plug and the contact pad; and a variable resistance element formed over the contact pad.