The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2018
Filed:
Jul. 08, 2015
Applicant:
The Regents of the University of California, Oakland, CA (US);
Inventor:
John E. Bowers, Santa Barbara, CA (US);
Assignee:
The Regents of the University of California, Oakland, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/18 (2006.01); G02B 6/122 (2006.01); H01S 5/02 (2006.01); H01S 5/026 (2006.01); H01S 5/125 (2006.01); G02B 6/12 (2006.01); G02F 1/017 (2006.01); H01S 5/343 (2006.01); H01L 27/146 (2006.01); H01L 31/12 (2006.01); H01S 5/183 (2006.01);
U.S. Cl.
CPC ...
G02B 6/1225 (2013.01); G02B 6/12002 (2013.01); G02F 1/01708 (2013.01); H01L 31/1852 (2013.01); H01S 5/021 (2013.01); H01S 5/0208 (2013.01); H01S 5/0215 (2013.01); H01S 5/0261 (2013.01); H01S 5/0268 (2013.01); H01S 5/125 (2013.01); H01S 5/343 (2013.01); G02B 2006/12061 (2013.01); G02B 2006/12107 (2013.01); G02B 2006/12121 (2013.01); G02B 2006/12128 (2013.01); G02B 2006/12147 (2013.01); H01L 27/146 (2013.01); H01L 31/125 (2013.01); H01S 5/0217 (2013.01); H01S 5/18341 (2013.01); H01S 5/18369 (2013.01); Y02E 10/544 (2013.01); Y02P 70/521 (2015.11);
Abstract
Photonic integrated circuits on silicon are disclosed. By bonding a wafer of HI-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.