The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2018

Filed:

Apr. 28, 2017
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jagannathan Venkataraman, Bangalore, IN;

Eeshan Miglani, Madhya Pradesh, IN;

Karthikeyan Gunasekaran, Tamil Nadu, IN;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 3/00 (2006.01); H03M 1/74 (2006.01); H03M 1/12 (2006.01); H03M 1/00 (2006.01);
U.S. Cl.
CPC ...
H03M 3/38 (2013.01); H03M 3/412 (2013.01); H03M 3/436 (2013.01); H03M 3/50 (2013.01); H03M 1/00 (2013.01); H03M 1/12 (2013.01); H03M 1/747 (2013.01);
Abstract

A digital-to-analog converter includes an adder having a plurality of inputs and an output coupled to the output of the converter. The converter further includes a plurality of digital-to-analog (DAC) elements, each DAC element has an output coupled to an input of the adder, and each DAC element has a DAC element input. A plurality of comparators have outputs coupled to a DAC element input. A first input of each comparator is coupled to the input of the converter. A second input of each comparator is selectively coupled to one of a predetermined voltage and a pseudo-random bit sequence (PRBS[n]).


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