The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2018

Filed:

Apr. 27, 2017
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Keng-Meng Chang, Hsinchu, TW;

Yao-Chi Wang, Hsinchu, TW;

Assignee:

MEDIATEK INC., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/003 (2006.01); H04B 1/00 (2006.01); H03L 7/00 (2006.01); H03H 11/30 (2006.01); H03K 5/159 (2006.01); H03K 19/0175 (2006.01); H03K 19/00 (2006.01); H04B 1/04 (2006.01); H04B 1/16 (2006.01); H04L 25/02 (2006.01); H03L 1/02 (2006.01); H03L 7/18 (2006.01); H03L 7/10 (2006.01); H03L 7/113 (2006.01); H03K 19/21 (2006.01);
U.S. Cl.
CPC ...
H03H 11/30 (2013.01); H03K 5/159 (2013.01); H03K 19/0005 (2013.01); H03K 19/017545 (2013.01); H03L 1/022 (2013.01); H03L 7/103 (2013.01); H03L 7/113 (2013.01); H03L 7/18 (2013.01); H04B 1/0475 (2013.01); H04B 1/1638 (2013.01); H04L 25/028 (2013.01); H04L 25/0278 (2013.01); H04L 25/0292 (2013.01); H03K 19/21 (2013.01);
Abstract

A biased impedance circuit, an impedance adjustment circuit, and an associated signal generator are provided. The biased impedance circuit is coupled to a summation node and applies a biased impedance to the summation node. A periodic input signal is received at the summation node. The biased impedance circuit includes a switching circuit for receiving an output window signal, wherein a period of the output window signal is shorter than a period of the periodic input signal. The switching circuit includes a low impedance path and a high impedance path. The low impedance sets the biased impedance to a first impedance when the output window signal is at a first voltage level. The high impedance path sets the biased impedance to a second impedance when the output window signal is at a second voltage level. The first impedance is less than the second impedance.


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