The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2018

Filed:

Dec. 11, 2015
Applicant:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Inventors:

Yuya Abiko, Ibaraki, JP;

Satoshi Eguchi, Ibaraki, JP;

Akio Ichimura, Ibaraki, JP;

Natsuo Yamaguchi, Ibaraki, JP;

Tetsuya Iida, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/8234 (2006.01); H01L 27/06 (2006.01); H01L 29/417 (2006.01); H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0696 (2013.01); H01L 21/823412 (2013.01); H01L 21/823418 (2013.01); H01L 21/823487 (2013.01); H01L 27/0688 (2013.01); H01L 29/06 (2013.01); H01L 29/0634 (2013.01); H01L 29/0684 (2013.01); H01L 29/0878 (2013.01); H01L 29/1095 (2013.01); H01L 29/41741 (2013.01); H01L 29/66727 (2013.01); H01L 29/7393 (2013.01); H01L 29/7395 (2013.01); H01L 29/7811 (2013.01);
Abstract

In a semiconductor device including a super junction structure that p-type columns and n-type columns are periodically arranged, a depth of a p-type column region in a cell region that a semiconductor element is formed is made shallower than a depth of a p-type column region in an intermediate region which surrounds the cell region. Thereby, a breakdown voltage of the cell region becomes lower than a breakdown voltage of the intermediate region. An avalanche breakdown phenomenon is caused to occur preferentially in the cell region in which even when an avalanche current is generated, the current is dispersed and smoothly flows. Thereby, it is possible to avoid local current constriction and breakage incidental thereto and consequently it becomes possible to improve avalanche resistance (an avalanche current amount with which a semiconductor device comes to be broken).


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