The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2018
Filed:
Aug. 30, 2016
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Yong-Hoon Son, Yongin-si, KR;
Jong-Won Kim, Hwaseong-si, KR;
Chang-Seok Kang, Seongnam-si, KR;
Young-Woo Park, Seoul, KR;
Jae-Duk Lee, Seongnam-si, KR;
Kyung-Hyun Kim, Seoul, KR;
Byeong-Ju Kim, Hwaseong-si, KR;
Phil-Ouk Nam, Suwon-si, KR;
Kwang-Chul Park, Suwon-si, KR;
Yeon-Sil Sohn, Yongin-si, KR;
Jin-I Lee, Hwaseong-si, KR;
Won-Bong Jung, Seoul, KR;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;
Abstract
A nonvolatile memory device includes a conductive line disposed on a substrate and vertically extended from the substrate, a first channel layer disposed on the substrate and vertically extended from the substrate, wherein the first channel layer is spaced apart from the conductive line, a second channel layer vertically extended from the substrate, wherein the second channel layer is disposed between the first channel layer and the conductive line, a first gate electrode disposed between the conductive line and the second channel layer, wherein the first gate electrode includes a first portion having a first thickness and a second portion having a second thickness that is different from the first thickness, and a second gate electrode disposed between the first channel layer and the second channel layer, wherein the second gate electrode has the second thickness.