The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2018
Filed:
Jul. 15, 2015
Applicant:
Sts Semiconductor & Telecommunications Co., Ltd., Chungcheongnam-do, KR;
Inventors:
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 21/48 (2006.01); H01L 21/683 (2006.01); H01L 23/538 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01); H01L 25/16 (2006.01); H01L 23/498 (2006.01); H01L 23/50 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 21/486 (2013.01); H01L 21/4853 (2013.01); H01L 21/6835 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/97 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 23/49816 (2013.01); H01L 23/50 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 24/92 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/16 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/17181 (2013.01); H01L 2224/2518 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48235 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73259 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/83815 (2013.01); H01L 2224/92143 (2013.01); H01L 2224/97 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/18162 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19104 (2013.01); H01L 2924/19105 (2013.01);
Abstract
Provided is a method of manufacturing a wafer level package. The method includes forming a repassivation layer that encapsulates a plurality of semiconductor chips isolated from a wafer, forming a through encapsulation via (TEV) in the repassivation layer, forming a redistribution layer electrically connected to the TEV, and forming a bump ball on the redistribution layer.