The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2018

Filed:

Oct. 30, 2013
Applicants:

Imec Vzw, Leuven, BE;

Nederlandse Organisatie Voor Toegepast-natuurwetenschappelijk Onderzoek Tno, 's Gravenhage, NL;

Inventor:

Jan Genoe, Messelbroek, BE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/3225 (2016.01); G09G 3/20 (2006.01); G09G 3/3233 (2016.01); G09G 3/3258 (2016.01); G09G 3/3266 (2016.01); G02F 1/13 (2006.01); G09G 3/36 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3225 (2013.01); G02F 1/13 (2013.01); G09G 3/2003 (2013.01); G09G 3/2018 (2013.01); G09G 3/2025 (2013.01); G09G 3/3233 (2013.01); G09G 3/3258 (2013.01); G09G 3/3266 (2013.01); G09G 3/36 (2013.01); G09G 3/3648 (2013.01); G09G 2300/08 (2013.01); G09G 2310/027 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/061 (2013.01); G09G 2320/0247 (2013.01); G09G 2320/043 (2013.01); G09G 2330/02 (2013.01);
Abstract

A method for digital driving of an active matrix display with a predetermined frame rate is described. The display contains a plurality of pixels organized in a plurality of rows and a plurality of columns. The method includes representing each of the plurality of pixels of an image to be displayed within a frame by an n-bit digital image code. The method also includes dividing the image frame into sub-frames, which may be of substantially equal duration. Within each sub-frame, the method includes sequentially selecting at least one of the plurality of rows twice. Upon a first selection, a first digital code is written to the selected row and upon a second selection a second digital code is written to the selected row. There is a predetermined time delay between the second selection and the first selection. Digital driving circuitry is also described.


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