The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 27, 2018
Filed:
Oct. 07, 2013
Coherent Logix, Incorporated, Austin, TX (US);
Stephen E. Lim, Scotts Valley, CA (US);
Viet N. Ngo, Austin, TX (US);
Jeffrey M. Nicholson, Lakeville, MN (US);
John Mark Beardslee, Menlo Park, CA (US);
Teng-I Wang, Yorba Linda, CA (US);
Zhong Qing Shang, Cupertino, CA (US);
Michael Lyle Purnell, Scotts Valley, CA (US);
Coherent Logix, Incorporated, Austin, TX (US);
Abstract
Techniques for specifying and implementing a software application targeted for execution on a multiprocessor array (MPA). The MPA may include a plurality of processing elements, supporting memory, and a high bandwidth interconnection network (IN), communicatively coupling the plurality of processing elements and supporting memory. In one embodiment, software code may include first program instructions executable to perform a function. In this embodiment, the software code may also include one or more language constructs that are configurable to specify one or more communication ports and one or more parameter inputs. In this embodiment, the one or more communication ports are configurable to specify communication with other software code. In this embodiment, the one or more parameter inputs are configurable to specify a set of hardware resources usable to execute the software code. In this embodiment, the hardware resources include multiple processors and may include multiple supporting memories.