The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2018

Filed:

Oct. 29, 2012
Applicants:

Peking University Founder Group Co., Ltd., Beijing, CN;

Chongqing Founder Hi-tech Electronic Inc., Chongqing, CN;

Zhuhai Founder Pcb Development Co., Ltd., Zhuhai, CN;

Inventors:

Xinhong Su, Zhuhai, CN;

George Dudnikov, Jr., Zhuhai, CN;

Shuhan Shi, Zhuhai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H05K 3/42 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0298 (2013.01); H05K 1/0296 (2013.01); H05K 3/429 (2013.01); H05K 1/116 (2013.01); H05K 2201/09645 (2013.01); H05K 2201/09718 (2013.01); Y10T 29/49165 (2015.01);
Abstract

Embodiments of the present application relate to the technical field of a printed circuit plate, in particular, to a printed circuit plate and a method manufacturing same so as to resolve a problem of an incomplete elimination of a short-line effect. The method for manufacturing a printed circuit board in the embodiments of the present application comprises a step of drilling target prepregs at positions corresponding to at least one preset hole therein so as to form through holes perforating through the target prepregs, wherein the formed through holes have an aperture greater than that of the preset hole, and the preset hole does not need to transmit electrical signal between layers of the PCB. The method further comprises: filling the formed through holes with a plating resist ink to prevent the through holes from being plated with a conductive material; laminating the target prepregs and core boards so as to form a multi-layer printed circuit board PCB, wherein some or all of the prepregs are the target prepregs; drilling the multi-layer PCB to perforate the preset holes in the target prepregs; and plating inner walls of holes formed by drilling the multi-layer PCB.


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