Low temperature poly-silicon thin-film transistor and manufacturing method thereof

Abstract

The present invention provides a low temperature poly-silicon thin-film transistor, as well as a manufacturing method thereof, which includes: a substrate (), a light shield layer () formed on the substrate (), a pad layer () formed on the light shield layer (), a dielectric layer () formed on the pad layer, an active layer () formed on the dielectric layer, a gate insulation layer () formed on the active layer (), and a gate layer () formed on the gate insulation layer (). The light shield layer () includes a planar section () formed on the substrate () and a raised section () formed on the planar section (). The active layer () has a projection that covers at least a partial area of an upper surface of the raised section () and one of sidewalls () of the raised section (). Without varying an aperture ratio of a display device, the channel width can be effectively increased and the width-to-length ratio can be increased so as to increase an open state current and enhance driving power of the LTPS TFT and device performance.