The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2018
Filed:
May. 18, 2017
Applicant:
Magnachip Semiconductor, Ltd., Cheongju-si, KR;
Inventors:
Duk Ju Jeong, Seoul, KR;
Su Jin Kim, Cheonan-si, KR;
Assignee:
Magnachip Semiconductor, Ltd., Cheongju-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/00 (2006.01); G11C 17/16 (2006.01); H01L 23/525 (2006.01); H01L 29/49 (2006.01); H01L 27/112 (2006.01); H01L 49/02 (2006.01); H01L 23/528 (2006.01); G11C 17/18 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
G11C 17/165 (2013.01); G11C 17/18 (2013.01); H01L 23/528 (2013.01); H01L 23/5252 (2013.01); H01L 27/11206 (2013.01); H01L 28/40 (2013.01); H01L 29/42368 (2013.01); H01L 29/4975 (2013.01);
Abstract
An anti-fuse device includes a gate insulating film formed on a semiconductor substrate, a gate electrode formed on the gate insulating film, and a salicide layer formed on a first portion of the gate electrode such that a second portion of the gate electrode omits the salicide layer, wherein a hard breakdown of at least a portion of the gate insulating film at a time of programming the anti-fuse device.