The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2018

Filed:

Dec. 16, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do OT, KR;

Inventors:

Youngmin Kim, Seoul, KR;

Il Han Park, Suwon-si, KR;

Sung-Won Yun, Suwon-si, KR;

Hyejin Yim, Wonju-si, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/34 (2006.01); G11C 11/56 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G11C 11/5671 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01); G11C 16/3481 (2013.01);
Abstract

A nonvolatile memory device is provided as follows. A memory cell array includes a plurality of memory cells. An address decoder provides a first verify voltage to selected memory cells among the plurality of memory cells in a first program loop and provides a second verify voltage to the selected memory cells in a second program loop. A control logic determines the second program loop as a verify voltage offset point in which the first verify voltage is changed to the second verify voltage based on a result of a verify operation of the first program loop.


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