The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2018

Filed:

Oct. 24, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventor:

Koji Hosono, Fujisawa Kanagawa, JP;

Assignee:

Toshiba Memory Corporation, Tokyo, unknown;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/4063 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 11/56 (2006.01); G11C 16/08 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3427 (2013.01); G11C 11/5642 (2013.01); G11C 16/0408 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01);
Abstract

A nonvolatile semiconductor memory device includes a memory cell array having first and second groups of memory strings, each memory string including first and second memory cells connected between select transistors. The nonvolatile semiconductor memory device further includes a first word line connected to the first memory cells of the memory strings, a second word line connected to the second memory cells of the memory strings, and a control unit configured to control application of control voltages to the select transistors and the word lines, such that a select line voltage is applied to the first word line and a non-select line voltage is applied to the second word line and not discharged while select transistors of the first group of memory strings are turned off and select transistors of the second group of memory strings are turned on.


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