The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 20, 2018
Filed:
Jun. 24, 2013
Universite Pierre ET Marie Curie (Paris 6), Paris, FR;
Centre National DE LA Recherche Scientifique, Paris, FR;
Ramy Iskander, Paris, FR;
Marie-Minerve Louerat, Paris, FR;
Andreas Kaiser, Villeneuve d'ascq, FR;
Farakh Javid, Levallois-perret, FR;
UNIVERSITE PIERRE ET MARIE CURIE (PARIS 6), Paris, FR;
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, Paris, FR;
Abstract
A method is provided for providing an automated assistance to design an analog non linear circuit under transient conditions, and to a corresponding system. The method enables the circuit designer to consider with simulation the time reactive effects of generally nonlinear components, while keeping the significant and intuitive qualities of an analysis view design tool like the CAIRO+/CHAMS environment. The method includes at least a transient instant solving procedure producing a numerical simulation that uses a given set of sizes and biases to provide a set of local behavior parameters in at least one node at current time. This transient instant solving procedure includes an incremental iteration under transient conditions of an evaluation in an analysis view of a dependency graph of the functional structure of the circuit. An optional transient analysis performs a numerical simulation to provide a time dependent behavior simulation of the circuit, and a performance evaluation.