The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2018

Filed:

Feb. 10, 2017
Applicant:

Shenzhen China Star Optoelectronics Technology Co., Ltd., Shenzhen, Guangdong, CN;

Inventor:

Xiangyang Xu, Guangdong, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/136 (2006.01); G02F 1/1362 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); G02F 1/1335 (2006.01); G02F 1/1339 (2006.01); G02F 1/1368 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); G02F 1/1333 (2006.01); G02F 1/1343 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136286 (2013.01); G02F 1/1339 (2013.01); G02F 1/1368 (2013.01); G02F 1/13439 (2013.01); G02F 1/133345 (2013.01); G02F 1/133512 (2013.01); G02F 1/133514 (2013.01); G02F 1/136209 (2013.01); H01L 21/0262 (2013.01); H01L 21/0274 (2013.01); H01L 21/02274 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 27/124 (2013.01); H01L 27/127 (2013.01); H01L 27/1218 (2013.01); H01L 27/1222 (2013.01); H01L 27/1259 (2013.01); H01L 27/1262 (2013.01); H01L 29/42364 (2013.01); H01L 29/42372 (2013.01); H01L 29/495 (2013.01); H01L 29/4908 (2013.01); H01L 29/66765 (2013.01); H01L 29/78633 (2013.01); H01L 29/78669 (2013.01); G02F 2001/13606 (2013.01); G02F 2001/133302 (2013.01); G02F 2001/134372 (2013.01); G02F 2001/136295 (2013.01); G02F 2201/121 (2013.01); G02F 2201/123 (2013.01); G02F 2202/103 (2013.01);
Abstract

A manufacturing method of an array substrate includes: providing a first substrate; forming a gate line, a data line, and a thin-film transistor array on the first substrate; forming a pixel electrode on the thin-film transistor array; depositing and forming a first passivation layer on the pixel electrode, the data line, and the thin-film transistor array; forming a black matrix on the first passivation layer; and forming a common electrode on the black matrix and the first passivation layer. The black matrix has a size that completely covers at least the data line such that when the common electrode is formed on the black matrix and the first passivation layer, a portion of the common electrode that corresponds exactly to the data line is completely spaced from the data line by the black matrix and the first passivation layer.


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