The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2018

Filed:

May. 20, 2015
Applicant:

Broadpak Corporation, San Jose, CA (US);

Inventor:

Farhang Yazdani, Santa Clara, CA (US);

Assignee:

BroadPak Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 23/66 (2006.01); H01L 21/48 (2006.01); H01L 21/52 (2006.01); H01L 23/04 (2006.01); H01L 23/31 (2006.01); H01L 23/473 (2006.01); H01L 25/18 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 21/486 (2013.01); H01L 21/52 (2013.01); H01L 23/04 (2013.01); H01L 23/3107 (2013.01); H01L 23/473 (2013.01); H01L 23/49833 (2013.01); H01L 23/49838 (2013.01); H01L 23/573 (2013.01); H01L 23/66 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 24/48 (2013.01); H01L 2224/48227 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06572 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/30107 (2013.01); Y10T 29/53174 (2015.01); Y10T 29/53178 (2015.01); Y10T 29/53183 (2015.01);
Abstract

Integrated circuits are described which directly connect a semiconductor interposer to a motherboard or printed circuit board by way of large pitch connections. A stack of semiconductor interposers may be connected directly to one another by a variety of means and connected to a printed circuit board through only a ball grid array of solder bumps. The stack of semiconductor interposers may include one or more semiconductor interposers which are shifted laterally to enable directly electrical connections to intermediate semiconductor interposers. The top semiconductor interposer may have no electrical connections on the top to increase security by making electrical 'taps' much more difficult. An electrically insulating layer may be incorporated between adjacent semiconductor interposers and cavities or air gaps may also be included within one or more semiconductor interposers.


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