The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2018

Filed:

Jan. 23, 2017
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Keiichi Sawa, Yokkaichi, JP;

Shinji Mori, Yokkaichi, JP;

Masayuki Tanaka, Yokkaichi, JP;

Katsuyuki Kitamoto, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2017.01); H01L 21/28 (2006.01); H01L 27/1157 (2017.01); H01L 27/11582 (2017.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28282 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11582 (2013.01);
Abstract

A semiconductor memory device includes a first electrode layer; a second electrode layer provided above the first electrode layer; a first insulating oxide layer provided between the first and second electrode layers; a semiconductor layer extending through the first electrode layer, the first insulating oxide layer and the second electrode layer that are stacked in the first direction; and a second insulating oxide layer extending in the first direction between the semiconductor layer and the first insulating oxide layer, the second insulating oxide layer being in contact with the first insulating oxide layer. At least one of the first insulating oxide layer and the second insulating oxide layer includes nitrogen atoms. The nitrogen atoms are distributed around an interface between the first insulating oxide layer and the second insulating oxide layer, or distributed in the vicinity of the interface.


Find Patent Forward Citations

Sawa, Keiichi. (2018). Semiconductor memory device and method for manufacturing same (U.S. Patent No. 9892930). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9892930

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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