The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2018
Filed:
Feb. 24, 2012
Gary L. Taylor, Windsor, CO (US);
Gary L. Taylor, Windsor, CO (US);
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD., Singapore, SG;
Abstract
A pseudo-dual-port (PDP) memory system includes a memory array, timing and control logic, and multiplexer-latch (MUX-latch). The MUX-latch comprises integrated address selection logic and latching logic, such that the combination multiplexes and latches an address in a single change in response to a state change in the read select or write select signals. The multiplexing and latching defines a single operation or state change in the MUX-latch. Since the multiplexing delay and the latching delay for a read operation are coincident with each other rather than being incurred one after the other, memory read operations are fast.