The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2018

Filed:

Apr. 12, 2017
Applicant:

SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;

Inventors:

Chang Hyun Kim, Seoul, KR;

Min Chang Kim, Seoul, KR;

Do Yun Lee, Yongin-si, KR;

Yong Woo Lee, Seongnam-si, KR;

Jae Jin Lee, Gwangju-si, KR;

Hun Sam Jung, Icheon-si, KR;

Hoe Kwon Jung, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G11C 11/4094 (2006.01); G11C 11/408 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/40611 (2013.01); G11C 11/4087 (2013.01); G11C 11/4094 (2013.01); G11C 11/4096 (2013.01); G11C 11/40615 (2013.01);
Abstract

A memory device may include: an active controller configured to output a row active signal in response to a refresh control signal and a row enable signal when an active signal is activated; a refresh controller configured to generate and store a flag bit for controlling a refresh operation in response to a refresh signal, a precharge signal, and a precharge stop signal, and output the row enable signal corresponding to the stored flag bit to the active controller; and a cell array circuit configured to perform a refresh operation in memory cell array areas in response to the row active signal.


Find Patent Forward Citations

Loading…