The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2018

Filed:

Mar. 18, 2015
Applicant:

Casio Computer Co., Ltd., Shibuya-ku, Tokyo, JP;

Inventors:

Bungo Murakami, Koganei-shi, JP;

Hideo Suzuki, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01); G06F 13/362 (2006.01); H04N 21/43 (2011.01); H04N 21/4725 (2011.01); H04N 21/81 (2011.01); H04N 21/858 (2011.01); G06F 13/28 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/3625 (2013.01); H04N 21/4307 (2013.01); H04N 21/4725 (2013.01); H04N 21/812 (2013.01); H04N 21/8583 (2013.01); H04N 21/8586 (2013.01); G06F 13/28 (2013.01); G06F 13/4022 (2013.01); G06F 13/4027 (2013.01);
Abstract

In order to perform processing corresponding to an instruction or a reaction at appropriate timing when a predetermined instruction is given or a reaction by a user is made while content is being outputted, a CPU detects instruction timing when a predetermined user instruction is given for data outputted while pieces of data constituting content are being sequentially outputted; stores the detected instruction timing in an instruction information memory; specifies predetermined timing that comes later than the instruction timing stored in the instruction information memory as timing for performing processing in accordance with the user's instruction; and performs the processing.


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