The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2018

Filed:

Jun. 25, 2015
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Nagaraj Savithri, Plano, TX (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G01R 31/317 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31718 (2013.01); G01R 31/31725 (2013.01); H03K 19/17748 (2013.01);
Abstract

Techniques for intelligent tuning of speed models for configurable integrated circuits. The techniques consider data related to yield, quality-of-results, and data for individual programmable-interconnect-point (PIP)-contexts. More specifically, the speed of yield-related structures, quality-of-results related structures, and structures for measuring individual PIP-contexts are measured. These measurements are compared with estimated values stored as part of a speed model and scaling factors for the stored estimated values are calculated. The scaling factors are applied to the estimated values within the speed model and measurements are repeated if desired.


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