The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2018

Filed:

Jul. 29, 2016
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Soichi Homma, Yokkaichi Mie, JP;

Yuusuke Takano, Yokkaichi Mie, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/3107 (2013.01); H01L 23/3121 (2013.01); H01L 23/3128 (2013.01); H01L 23/49805 (2013.01); H01L 23/49827 (2013.01); H01L 24/97 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 23/49816 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/92 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13113 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13118 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13144 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16235 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/81011 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/97 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/15313 (2013.01); H01L 2924/181 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A semiconductor device includes a wiring substrate that includes a base having a first surface, a second surface, and a wiring, a semiconductor chip located on the first surface, an external connection terminal located on the second surface and electrically connected to the wiring, a sealing resin layer covering the semiconductor chip, a metal compound layer containing a metal nitride in contact with a surface of the sealing resin layer, and a conductive shield layer covering the sealing resin layer with the metal compound layer interposed between the conductive shield layer and the sealing resin layer. The wiring is exposed at a side surface of the wiring substrate, and is electrically connected to the conductive shield layer.


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