The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2018

Filed:

Sep. 03, 2015
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

L. James Hwang, Portola Valley, CA (US);

Vinod K. Kathail, Palo Alto, CA (US);

Sundararajarao Mohan, Sunnyvale, CA (US);

Jorge E. Carrillo, San Jose, CA (US);

Hua Sun, San Jose, CA (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/24 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 3/00 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4256 (2013.01); G06F 13/24 (2013.01); G06F 13/4022 (2013.01);
Abstract

Application-specific tailoring and reuse of a platform for a target integrated circuit may include determining, using a processor, a plurality of unused interfaces of the platform and determining, using the processor, connectivity of a circuit block to be coupled to the platform within the target integrated circuit. The method may include coupling, using the processor, the circuit block to the platform using an interface that is compatible with the circuit block and selected from the plurality of unused interfaces of the platform.


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