The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 30, 2018
Filed:
Jan. 08, 2015
Lenovo Enterprise Solutions (Singapore) Pte. Ltd., Singapore, SG;
Michael Decesaris, Carrboro, NC (US);
Steven C. Jacobson, Mebane, NC (US);
Luke D. Remis, Raleigh, NC (US);
Gregory D. Sellman, Morrisille, NC (US);
Lenovo Enterprise Solutions (Singapore) Pte. Ltd., Singapore, SG;
Abstract
Optimizing an IC bus frequency, the bus including signal lines coupling a master and slave nodes, a signal line coupled to a rise time detection circuit monitoring a voltage of the signal line, the voltage alternating between a logic low and logic high, where optimizing the frequency includes: detecting, during a rise in the signal line, a first voltage, the first voltage being greater than the logic low voltage; starting a counter to increment once for each clock period of the circuit; detecting a second voltage on the signal line, the second voltage greater than the first and less than the logic high; stopping the counter; calculating, in dependence upon the clock period and the counter value, a rise time; determining whether the rise time is greater than a maximum threshold; and increasing the IC bus frequency if the calculated rise time is greater than the maximum threshold.