The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2018
Filed:
Dec. 27, 2016
Sarma Vrudhula, Chandler, AZ (US);
Aykut Dengi, Tempe, AZ (US);
Niranjan Kulkarni, Tempe, AZ (US);
Joseph Davis, Mesa, AZ (US);
Sarma Vrudhula, Chandler, AZ (US);
Aykut Dengi, Tempe, AZ (US);
Niranjan Kulkarni, Tempe, AZ (US);
Joseph Davis, Mesa, AZ (US);
Arixona Board of Regents on Behalf of Arizona State University, Scottsdale, AZ (US);
Abstract
A threshold logic element (TLE) is disclosed. The TLE includes a first input gate network, a second input gate network, and a differential sense amplifier. The first input gate network is configured to receive a first set of logical signals and the second input gate network configured to receive a second set of logical signals. The differential sense amplifier is operably associated with the first input gate network and the second input gate network such that the differential sense amplifier is configured to generate a differential logical output in accordance with a threshold logic function. To obfuscate the TLE, any number of obfuscated transmission gates can be provided in one or both of the input gate networks. The obfuscated transmission gates are obfuscated such that obfuscated transmission gates are incapable of effecting the threshold logic function of the TLE and thus hide the functionality of the TLE.