The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2018

Filed:

Jul. 31, 2015
Applicants:

Arm Limited, Cambridge, GB;

Apple, Inc., Cupertino, CA (US);

Inventors:

Mbou Eyole, Cambridge, GB;

Nigel John Stephens, Cambridge, GB;

Jeffry Gonion, Cupertino, CA (US);

Alex Klaiber, Cupertino, CA (US);

Charles Tucker, Cupertino, CA (US);

Assignees:

ARM Limited, Cambridge, GB;

Apple, Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2006.01); G06F 9/312 (2006.01); G06F 9/34 (2006.01); G06F 9/345 (2006.01); G06F 9/35 (2006.01); G06F 9/355 (2006.01); G06F 9/38 (2006.01); G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
G06F 15/8076 (2013.01); G06F 9/3004 (2013.01); G06F 9/30036 (2013.01); G06F 9/30043 (2013.01); G06F 9/30101 (2013.01); G06F 9/30109 (2013.01); G06F 9/345 (2013.01); G06F 9/3887 (2013.01); G06F 9/3455 (2013.01); G06F 9/355 (2013.01);
Abstract

An apparatus and method are provided for transferring a plurality of data structures between memory and a plurality of vector registers, each vector register being arranged to store a vector operand comprising a plurality of data elements. Access circuitry is used to perform access operations to move data elements of vector operands between the data structures in memory and specified vector registers, each data structure comprising multiple data elements stored at contiguous addresses in the memory. Decode circuitry is responsive to a single access instruction identifying a plurality of vector registers and a plurality of data structures that are located discontiguously with respect to each other in the memory, to generate control signals to control the access circuitry to perform a sequence of access operations to move the plurality of data structures between the memory and the plurality of vector registers such that the vector operand in each vector register holds a corresponding data element from each of the plurality of data structures. This provides a very efficient mechanism for performing complex access operations, resulting in an increase in execution speed, and potential reductions in power consumption.


Find Patent Forward Citations

Loading…