The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Apr. 20, 2015
Applicant:

Sony Corporation, Tokyo, JP;

Inventor:

Yasuaki Hisamatsu, Fukuoka, JP;

Assignee:

SONY CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/34 (2006.01); H04N 5/374 (2011.01); H03K 23/86 (2006.01); H03K 21/02 (2006.01); H03K 21/38 (2006.01); H04N 5/3745 (2011.01); H04N 5/376 (2011.01);
U.S. Cl.
CPC ...
H04N 5/3742 (2013.01); H03K 21/023 (2013.01); H03K 21/026 (2013.01); H03K 21/38 (2013.01); H03K 23/86 (2013.01); H03M 1/34 (2013.01); H04N 5/3765 (2013.01); H04N 5/37455 (2013.01);
Abstract

A counter configured to perform counting at both edges of an input clock to output an additional value or a subtraction value for a previous count value and a next count value includes a first latch circuit that latches the input clock, a second latch circuit that latches an output from the first latch circuit, a holding section that holds data of the 0th bit of a count value, and a correction section that performs count correction on data of the first and subsequent bits of the count value on the basis of an output of the second latch circuit.


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